In present-day power transistors, e.g. IGBTs and power MOSFETs, which are constructed as vertical power transistors and are implemented in a chip, the current flow is effected vertically through the chip. The chip has a semiconductor body delimited by a front side, a rear side, and four lateral edges. A first highly doped semiconductor zone of a first connection of the load path, e.g. a source zone or an emitter zone, is provided in the semiconductor body at the front side. A highly doped second semiconductor zone for a second connection of the load path, e.g. a drain or a collector, is provided in the semiconductor body at the rear side.
A control input, e.g. a gate or a base, is provided at the front side. The application of a voltage to the control input effects a current flow from the second to the first semiconductor zone if the voltage falls below or exceeds a specific threshold value.
If the rear side of the power transistor is connected to a chip carrier, the chip carrier acts as a capacitance at the drain or at the collector, which leads to large power losses and to high emissions upon changeover of the drain potential or the collector potential.
DE 198 06 817 discloses providing a feedthrough through a chip. Through said feedthrough, the connection for a gate is led from the front side to the rear side in order to make contact with the gate on the rear side. However, such a power transistor is only suitable for specific applications and, in particular, is poorly stackable.